US plans up to $2.2 billion in funding for packaging computer chips
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The plan is a major thrust in US efforts to stay ahead of China in creating components needed for applications like AI.
PHOTO: REUTERS
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SAN FRANCISCO - The Biden administration said on July 9 that it would direct up to US$1.6 billion (S$2.2 billion) in funding towards developing new technology for packaging computer chips, a major thrust in US efforts to stay ahead of China in creating components needed for applications like artificial intelligence.
The proposed funding, part of the money authorised under 2022 legislation called the Chips Act, will help companies innovate in areas such as creating faster ways to transfer data between chips in a package and managing the heat they generate, said Dr Laurie Locascio, an undersecretary in the Commerce Department who is also the director of its National Institute of Standards and Technology.
Her announcement, at an annual industry conference in San Francisco, serves as a starting gun for companies to start applying for grants to fund research and development projects, with awards expected to total up to US$150 million each.
“Our research and development efforts in advanced packaging will heavily focus on high-demand applications like high-performance computing and low-power electronics, both needed to enable leadership in artificial intelligence,” Dr Locascio said.
The Chips Act received bipartisan approval to invest US$52 billion to stoke domestic chip production, with most of the money directed towards the factories that turn silicon wafers into chips.
The US share of that activity has dwindled to around 10 per cent, much of it lost to companies in Asia. US reliance on factories run by Taiwan Semiconductor Manufacturing Co, or TSMC, in particular, has worried policymakers because of China’s territorial claims on Taiwan.
The dependence on foreign companies is even more stark in chip packaging. That process attaches finished chips – useless without ways to communicate with other pieces of hardware – onto a flat component called a substrate, which has electrical connectors. The combination is typically wrapped in plastic.
Packaging mainly takes place in Taiwan, Malaysia, South Korea, the Philippines, Vietnam and China. A US industry group called IPC, citing Defence Department data, has estimated that the US accounts for only about 3 per cent of advanced chip packaging.
With most federal funding so far directed towards the early stage of manufacturing, chips produced in new US factories might then be flown to Asia for packaging, which would do little to reduce dependence on foreign companies.
The situation is being compounded by companies increasingly striving for greater computing performance by packaging multiple chips side by side or on top of each other.
Nvidia, which dominates sales of chips for AI, recently announced a product called Blackwell that has two big processor chips surrounded by stacks of memory chips.
TSMC, which fabricates the latest chips for Nvidia, also packages them with advanced technology. TSMC is slated to receive federal grants for chip production in Arizona, but it has not said it will shift any packaging services from Taiwan.
Intel is considered a leader in packaging research and has invested heavily in upgrading factories in New Mexico and Arizona as part of broader efforts to compete with TSMC in manufacturing services.
But US companies could use federal money to help stay on the cutting edge, said Ms Jan Vardaman, president of TechSearch International, a consultancy focusing on chip packaging. The new grants are part of a plan called the National Advanced Packaging Manufacturing Programme, which Commerce Department officials said would receive about US$3 billion in total funding.
Some industry players are not waiting for government help. Resonac, a company based in Tokyo, announced on July 8 a new consortium with nine other Japanese and US companies to focus on packaging research and development in a new facility that will be built in Union City, California.
In an interview, Dr Locascio said the administration would also announce this week its conceptual model for the National Semiconductor Technology Centre, a proposed public-private partnership for chip research and development that is expected to include new facilities, which officials in multiple states hope to attract.
“We get a lot of calls daily about that,” Dr Locascio said, adding that the announcement should clarify what kinds of facilities are envisioned and “the process by which people can compete for those”. NYTIMES
